1. Field of the Invention
The present invention relates generally to a digital-to-analog converter (DAC) and, more particularly, to a method and apparatus for improving the accuracy of a DAC.
2. Description of the Prior Art
Over the past decade, tremendous changes have occurred in the implementation of electronic devices, due primarily to advances in processing techniques which presently allow the compression of entire electronic systems onto single chips, or small combinations of chips, on ceramic substrates. This compression has led to the development of the microprocessor which is a computer formed on a single semiconductor chip. Controllers using microprocessors are currently being used in many systems. Typically, the controller receives analog signals indicating a state of the system. The values of these analog signals are converted to digital numbers which are subsequently processed by the microprocessor. The digital output of the microprocessor indicates the value of control signals which may be utilized to alter the state of the system. The actual control signals that alter the state of the system are usually analog voltage or current signals. Thus, a digital to analog converter (DAC) is required to generate analog signals having the values specified by the digital output of the microprocessor.
The above-described improvements in the implementation of electronic devices have also affected the construction of DACs. Presently, entire DACs with interface and control circuit can be implemented in a single package and multiple converters now share the same on-chip data buses and reference voltage sources.
Unfortunately, although this compression of package size has created a flexibility in the implementation of DACs and their interface components, a comparable advance in DAC accuracy has not also been achieved. For example, sixteen-bit DACs complete with latches, reference voltage source, output amplifier, and scaling circuitry are available in twenty-eight to forty pin packages. Absolute accuracy, however, is still limited to about fourteen bits. Accordingly, there exists a compelling need to improve the accuracy of monolithic DACs.
Presently, most DACs are implemented by a resistor network for current or voltage switching. The performance of a DAC is modeled by a transfer characteristic which specifies the analog output of the DAC as a function if its digital input. Ideally, the transfer characteristic is a straight line with the slope of the line being the gain of the DAC. A realizable DAC will have a transfer characteristic which deviates from the ideal. This deviation is described by three forms of static error which are:
Offset--a deviation of the zero intercept of the transfer characteristic from the ideal;
Range--a deviation of the full scale value of the transfer characteristic from the predicted end point value (another measurement of this error is the deviation of the gain (slope) from the ideal transfer characteristic);
Non-linearity--a deviation of the transfer function from a straight line drawn through its end point, not including errors due to offset and range effects.
Presently, conventional static error correction techniques rely on generating the actual transfer characteristic of the DAC, forming a straight line between the end points of the actual transfer characteristic, determining the error function, i.e., the difference between the end point fit straight line and the actual transfer characteristic, and trimming the resistors of the DAC to minimize the error function.
These conventional techniques are effective in the limited case where the errors are due to non-interactive effects between the various resistors of the DAC. This technique does not, however, provide for a minimum number of trims. Since the process of trimming is time-consuming and expensive, it is highly desirous to minimize the number of trims. Additionally, if errors are due to interactive effects between the resistors, the end point fit conventional method does not minimize the mean square error or the peak error between the actual transfer characteristic and the ideal transfer characteristic.